1409-24331409-2433S1409-24332011000200003ItalyItalyItalyItaly0012201100122011182231248Parallelization of a quantum-classic hybrid model for nanoscale semiconductor devices
Paralelización del modelo híbrido clásico-cuántico para un dispositivo semiconductor Mosfet nanométrico
Oscar Salas* Piero Lanucara† Paola Pietra‡ Sergio Rovida§ Giovanni Sacchi¶ ]]>
*Department of Mathematics, Universidad Nacional, Heredia, Costa Rica. E-Mail: oscar.salas@unipv.it †Consortium for the Applications of Super-Computing for Universities and Research (CASPUR), c/o Università La Sapienza, P. Also Moro 2, 00185 Roma, Italy. E-Mail: lanucara@caspur.it ‡Institute of Applied Mathematics and Information Technologies, C.N.R., via Ferrata 1, 27100 Pavia, Italy. E-Mail: pietra@imati.cnr.it §Institute of Applied Mathematics and Information Technologies — CNR, Pavia, Italy. EMail: rovida@imati.cnr.it ¶Institute of Applied Mathematics and Information Technologies — CNR, Pavia, Italy. EMail: gianni.sacchi@imati.cnr.it
The expensive reengineering of the sequential software and the difficult parallel programming are two of the many technical and economic obstacles to the wide use of HPC. We investigate the chance to improve in a rapid way the performance of a numerical serial code for the simulation of the transport of a charged carriers in a Double-Gate MOSFET. We introduce the Drift-Diffusion-Schrödinger-Poisson (DDSP) model and we study a rapid parallelization strategy of the numerical procedure on shared memory architectures.
El transformar un software secuencial en uno paralelo, es costoso y difícil, lo cual constituye solo dos de los muchos obstáculos técnicos y económicos que se tienen que enfrentar cuando se desea hacer uso de sistemas HPC. En este trabajo investigamos la posibilidad de mejorar de forma rápida y eficiente el desempeño de un código numérico secuencial que se encarga de realizar la simulación del comportamiento y transporte de un flujo de electrones en un dispositivo semiconductor MOSFET doble puerta y de escala nanométrico. Se introduce el modelo Drift-Diffusion-Schrödinger-Poisson (DDSP) y se estudia una estrategia de paralelización rápida del procedimiento numérico, óptimo específicamente para arquitecturas a memoria compartida. ]]>
Palabras clave: Paralelezación; Paradigma de Memoria Compartida; Ecuación de Schrödinger; Sistemas Drift-Difusion; Modelo Subband; Nanotubos.
Mathematics Subject Classification: 65N55.
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References
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Correspondencia a: Oscar Salas. Department of Mathematics, Universidad Nacional, Heredia, Costa Rica. E-Mail: oscar.salas@unipv.it Piero Lanucara. Consortium for the Applications of Super-Computing for Universities and Research (CASPUR), c/o Università La Sapienza, P. Also Moro 2, 00185 Roma, Italy. E-Mail: lanucara@caspur.it Paola Pietra. Institute of Applied Mathematics and Information Technologies, C.N.R., via Ferrata 1, 27100 Pavia, Italy. E-Mail: pietra@imati.cnr.it Sergio Rovida. Institute of Applied Mathematics and Information Technologies — CNR, Pavia, Italy. EMail: rovida@imati.cnr.it Giovanni Sacchi. Institute of Applied Mathematics and Information Technologies — CNR, Pavia, Italy. EMail: gianni.sacchi@imati.cnr.it
Received: 23 Feb 2010; Revised: 24 Nov 2010; Accepted: 10 Dec 2010